VLSI/ASIC Technical Manager RESPONSiBILITIES: As a technical engineer within the VLSI Engineering team, you will be responsible for all development aspects of complex System-on-Chip ASICs for fixed and mobile communications systems. You will be a key contributor in a highly skilled engineering team tasked to deliver quality and cost effective ASICs. You will be responsible for the ASIC development process through complete pr ...[more]
Job Type:
Employee
Job Status:
Full Time
Hughes Network Systems
Germantown, MD 20876
Jul 1
Principal Algorithms Engineer We are seeking outstanding professionals to join our team. We offer an exciting, fast-paced startup environment, combined with the stability that comes from seasoned leadership and experienced entrepreneurs. Quartics technical team includes experts in the areas of VLSI, media processing algorithms, architecture, and embedded software. We value innovation and aggressively pursue patents around our p ...[more]
Relevant Work Experience:
10+ to 15 Years
Career Level:
Experienced (Non-Manager)
Education Level:
Doctorate
Job Type:
Employee
Job Status:
Full Time
Company Confidential
Irvine, CA 92618
Jul 1
Senior RTL Design Engineer Job Title: Senior RTL Design Engineer Description: Senior RTL design engineer to be responsible to design and verify Video related ASIC RTL block. May also be responsible for some RTL design work involved at the SOC level such as ARM interfaces, AHB/AXI bus structures and peripherals such as DDR2/3, PCIe, SATA, USB, 2d/3d graphics, encryption, etc. Requirements: 10+ years of RTL design experience D ...[more]
Relevant Work Experience:
10+ to 15 Years
Career Level:
Experienced (Non-Manager)
Education Level:
Master's Degree
Job Type:
Employee
Job Status:
Full Time
Company Confidential
Irvine, CA 92618
Jun 29
CMOS Analog Design Engineer Description The position described below is a job profile that is generally representative of current or future openings at Intel. By clicking the "Apply Now" button above, you are not applying for an open position. Instead you will be answering a series of questions that will enable Intel Recruiters to more effectively match you to current and future job openings. This process will take approxima ...[more]
Job Type:
Employee
Job Status:
Full Time
Intel Corporation
Multiple locations
Jun 23
Read Channel Verification Engineer Innovation. Excellence. Integrity. Not just abstract concepts at LSI Corporation, but the way we conduct business with customers, partners, and key stakeholders. Add individual responsibility to the mix and you have the recipe for a dynamic environment, technological achievement, challenging career opportunities, and the potential for personal growth. Employees at LSI understand that they are help ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
LSI Corporation
Bangalore, KT 560001
Jun 22
Senior VLSI CAD & Methodology Engineer Visualize your future . . . We Do NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people an ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
NVIDIA Corporation
Santa Clara, CA 95050
Jun 16
Research Software Engineer, Algorithm Developer Position Description: Group 102—Embedded Digital Systems The Embedded Digital Systems Group delivers real-time embedded processing capabilities for a broad spectrum of military applications. To this end, the group applies hardware architecture design, embedded software engineering, and signal processing analysis to a wide spectrum of military sensors and weapons systems, including space-borne and a ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
MIT Lincoln Laboratory
Lexington, MA 02420
Jun 9
Sr. Principal Engineer Description: Responsible for developing and maintaining new features and algorithms of Analog and Mixed Signal Design power/noise/reliability analysis solutions. Qualifications: Fluent in Linux C/C++ programming Knowledge or experience in VLSI circuit Knowledge or experience in parallel computing a plus Knowledge or experience in Substrate coupling noise analysis preferred Min. 5 years working exp ...[more]
Career Level:
Experienced (Non-Manager)
Education Level:
Master's Degree
Job Type:
Employee
Job Status:
Full Time
Apache Design Solutions
San Jose, CA
Jun 9
Senior CAD & Methodology Engineer Visualize your future . . . We Do NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people an ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
NVIDIA Corporation
Santa Clara, CA 95050
Jun 2
CMOS Image Design Engineer The Photonics Group Respond with resume to Senior CMOS Imager Design Engineer Description: Opportunity is for an experienced CMOS device engineer to work on cutting edge imager technology development. Individual will assume lead responsibility for CMOS imager and camera design, and will work closely with the development team on detailed sensor characterization and data analysis. Significant experi ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
MRINetwork
MA
Jun 1
Sr. DSP ASIC Design Engineer DSP Group is searching for a highly motivated Digital ASIC Design Engineer to assist in designing and verifying our baseband processors. Location: The position is in Minneapolis, Minnesota. Job Description Design complex wireless Digital Signal Processing ASICs. Tasks include specification, architecture, micro-architecture, RTL implementation (using Verilog) and verification. Work with other engin ...[more]
Career Level:
Experienced (Non-Manager)
Education Level:
Bachelor's Degree
Job Type:
Employee
Job Status:
Full Time
DSP Group, Inc.
Bloomington, MN 55437
May 27
Printer & Scanner Test Technician (Req 313) Intellectual Ventures (“IV”) and Quantum Intellectual Property Services seek a highly skilled, motivated and experienced Test Technician to support our Licensing division. IV is a privately-held, invention investment company based in Bellevue, Washington. Our business model centers on creating, acquiring and licensing pure invention in a variety of technology areas. We plan to commercialize invent ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
Intellectual Ventures
Bellevue, WA 98004
May 26
Senior Engineer - FPGA Goodrich Corporation, a Fortune 500 company, is a global supplier of systems and services to the aerospace, defense and homeland security markets. With more than $6 billion in annual revenues, Goodrich has one of the broadest portfolios of products in the aerospace industry. The company serves a global customer base, with over 24,000 employees across approximately 90 manufacturing and service faci ...[more]
Career Level:
Manager (Manager/Supervisor of Staff)
Job Type:
Employee
Job Status:
Full Time
GOODRICH AEROSPACE UK LIMITED
Pitstone
May 19
Senior Mixed Signal Design Engineer CMOS design engineer with strong analog design expertise as well as mixed-signal design capabilities Will act as main contributor in design, analysis, and implementation of high speed low jitter, low skew clock distribution for VLSI systems. Responsibilities: Will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units ( ...[more]
Career Level:
Experienced (Non-Manager)
Job Type:
Employee
Job Status:
Full Time
NVIDIA Corporation
Santa Clara, CA 95050
May 11
Senior VLSI Engineer Responsibilities: Responsible for physical design and implementation of high-speed semi-custom place-and-route blocks in graphics processor. Participating in the efforts in establishing CAD and physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure, - Static timing analysis, power and noise analysis and back-end verification. ...[more]
